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INTEGRATED CIRCUITS
DATA SHEET
P87CL881H Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
Product specification File under Integrated Circuits, IC17 1999 Apr 16
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
CONTENTS 1 2 3 4 5 5.1 5.2 6 6.1 6.2 6.3 6.4 6.5 6.6 7 8 9 9.1 10 11 11.1 11.2 11.3 11.4 11.5 12 13 14 FEATURES GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING INFORMATION Pinning Pin description FUNCTIONAL DESCRIPTION Special Function Registers I/O facilities Internal data memory OTP programming Oscillator circuitry Non-conformance LIMITING VALUES DC CHARACTERISTICS AC CHARACTERISTICS AC testing PACKAGE OUTLINE SOLDERING Introduction to soldering surface mount packages Reflow soldering Wave soldering Manual soldering Suitability of surface mount IC packages for wave and reflow soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
P87CL881H
1999 Apr 16
2
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
1 FEATURES
P87CL881H
* Full static 80C51 CPU; enhanced 8-bit architecture with: - Minimum 6 cycles per instruction (twice as fast as a standard 80C51 core) - Non-page oriented instructions - Direct addressing - Four 8-byte RAM register banks - Stack depth limited only by available internal RAM (maximum 256 bytes) - Multiply, divide, subtract and compare instructions. * Very low current consumption * Single supply voltage of 2.7 to 3.6 V * Frequency: 1 to 10 MHz * Operating temperature: -25 to +70 C * 44-pin LQFP package * Four 8-bit ports (32 I/O lines) * 63-kbyte One-Time Programmable (OTP) program memory; programmable in parallel mode or in-system via I2C-bus interface. * 256-byte internal RAM * 1792-byte internal AUX-RAM * External address range: 64 kbytes of ROM and 64 kbytes of RAM * Amplitude Controlled Oscillator (ACO) suitable for use with a quartz crystal or ceramic resonator * Improved Power-on/Power-off reset circuitry (POR) * Low Voltage Detection (LVD) with 11 software programmable levels * 8 interrupts on Port 1, edge or level sensitive triggering selectable via software power-saving use for keyboard control * Twenty source, twenty vector interrupt structure with two priority levels 3 ORDERING INFORMATION TYPE NUMBER(1) P87CL881H/000 P87CL881H/xxx Note 1. Please refer to the Order Entry Form (OEF) for this device for the full type number to use when ordering. This type number will also specify the required program and options. PACKAGE PRODUCT TYPE NAME Blank OTP Factory-programmed OTP LQFP44 DESCRIPTION plastic low profile quad flat package; 44 leads; body 10 x 10 x 1.4 mm VERSION SOT389-1 * Wake-up from Power-down mode via LVD or external interrupts at Port 1 * Two 16-bit timer/event counters * Additional 16-bit timer/event counters, with capture, compare and PWM function * Watchdog Timer * Full duplex enhanced UART with double buffering * I2C-bus interface for serial transfer on two lines, maximum operating frequency 400 kHz. 2 GENERAL DESCRIPTION
The P87CL881 is an 8-bit microcontroller especially suited for pager applications. The P87CL881 is manufactured in an advanced CMOS technology and is based on single chip technology. The device is optimized for low power consumption and has two software selectable features for power reduction: Idle and Power-down modes. In addition, all derivative blocks switch off their clock if they are inactive. The instruction set of the P87CL881 is based on that of the 80C51. The P87CL881 also functions as an arithmetic processor having facilities for both binary and BCD arithmetic plus bit-handling capabilities. The instruction set consists of over 100 instructions: 49 one-byte, 46 two-byte, and 16 three-byte. This data sheet details the specific properties of the P87CL881; for details of the P87CL881 core and the derivative functions see the "TELX family" data sheet and "8051-Based 8-bit Microcontrollers; Data Handbook IC20".
1999 Apr 16
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EA XTAL1 XTAL2 CLK (2) PSEN ALE WR (4) RD (4) LVD
4
Philips Semiconductors
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
BLOCK DIAGRAM
T0 (4)
INT1 (4) T1 (4) INT0 (4) INT2 to INT8 (2) VDD VDDP 7
VSS VSSP VPP(5)
TWO 16-BIT TIMER/ EVENT COUNTERS (T0, T1) 80C51 core excluding ROM/RAM
CPU
PROGRAM MEMORY ROM
DATA MEMORY RAM
DATA MEMORY AUX-RAM
P87CL881H
ACO
8-bit internal bus
handbook, full pagewidth
4
AD0 to AD7 (1) PARALLEL I/O PORTS A8 to A15 (3) SERIAL UART PORT RXD (4) P0 P1 P2 P3 TXD (4) (1) (2) (3) (4) (5) Alternative function of Port 0. Alternative function of Port 1. Alternative function of Port 2. Alternative function of Port 3. Alternative function of pin 6.
16-BIT TIMER/EVENT COUNTER WITH CAPTURE/ COMPARE/ (T2)
EEPROM
I2C-BUS INTERFACE
WATCHDOG TIMER (T3)
POR
MGL617
T2EX (2) T2 (2) T2COMP (2)
SDA (2) SCL (2)
RST
EW
PORENABLE
P87CL881H
Product specification
Fig.1 Block diagram.
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
5 5.1 PINNING INFORMATION Pinning
P87CL881H
handbook, full pagewidth
42 P1.2/INT4/T2COMP
41 P1.1/INT3/T2EX
44 P1.4/INT6/CLK
40 P1.0/INT2/T2
43 P1.3/INT5
37 P0.0/AD0
36 P0.1/AD1
35 P0.2/AD2
P1.5/INT7 P1.6/INT8/SCL P1.7/INT9/SDA RST P3.0/RXD/data PORENABLE/VPP P3.1/TXD/clock P3.2/INT0 P3.3/INT1
1 2 3 4 5 6 7 8 9
34 P0.3/AD3
38 VDDP
39 VDD
33 P0.4/AD4 32 P0.5/AD5 31 P0.6/AD6 30 P0.7/AD7 29 EA
P87CL881H
28 EW 27 ALE 26 PSEN 25 P2.7/A15 24 P2.6/A14 23 P2.5/A13
P3.4/T0 10 P3.5/T1 11
P3.6/WR 12
P3.7/RD 13
XTAL2 14
XTAL1 15
VSSP 16
VSS 17
P2.0/A8 18
P2.1/A9 19
P2.2/A10 20
P2.3/A11 21
P2.4/A12 22
MGL616
Fig.2 Pin configuration.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
5.2 Pin description LQFP package PIN 39 38 17 16 4 6 Power supply for core. Power supply for I/O ring. Ground for core. Ground for I/O ring. DESCRIPTION
P87CL881H
Table 1
SYMBOL VDD VDDP VSS VSSP RST PORENABLE/VPP
RESET. A LOW level on this pin for two machine cycles while the oscillator is running, resets the device. The RST pin is also an output which can be used to reset other ICs. PORENABLE. If set to a logic 1, the internal Power-on reset circuit is enabled. If external reset circuitry is used, it is recommended to keep PORENABLE LOW in order to achieve the lowest power consumption. This pin is also used for the OTP programming voltage VPP. Enable Watchdog Timer. Crystal output. Output of the amplitude controlled oscillator. If an external oscillator clock is used this pin not used. Crystal input. Input to the amplitude controlled oscillator. Also the input for an externally generated clock source. Program Store Enable. Read strobe to external program memory. When executing code out of external program memory, PSEN is activated twice each machine cycle. However, during each access to external data memory two PSEN activations are skipped. During Power-down mode the PSEN pin stays HIGH. Address Latch Enable. Latches the low byte of the address during accesses to external memory. It is activated every six oscillator periods and may be used for external timing or clocking purposes. For improved EMC behaviour, the toggle of the ALE pin can be disabled by setting the RFI bit in the PCON register by software. This bit is cleared on reset and can be set and cleared by software. When set, the ALE pin will be pulled-down internally, switching an external address latch to a quiet state. The MOVX instruction will still toggle ALE if external memory is accessed. ALE will retain its normal HIGH state during Idle mode and a LOW state during the Power-down mode while in the EMC mode. Additionally, during internal access (EA = 1) ALE will toggle normally when the address exceeds the internal program memory size. During external access (EA = 0) ALE will always toggle normally, whether the RFI bit is set or not. External Access. When EA is held HIGH, the CPU executes out of the internal program memory (unless the program counter exceeds the highest address for internal program memory). When EA is held LOW, the CPU executes out of external program memory regardless of the value of the program counter. The state of the EA pin is internally latched at reset.
EW XTAL2 XTAL1 PSEN
28 14 15 26
ALE
27
EA
29
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
SYMBOL P0.0/AD0 P0.1/AD1 P0.2/AD2 P0.3/AD3 P0.4/AD4 P0.5/AD5 P0.6/AD6 P0.7/AD7 P1.0/INT2/T2 P1.1/INT3/T2EX P1.2/INT4/ T2COMP P1.3/INT5 P1.4/INT6/CLK P1.5/INT7 P1.6/INT8/SCL P1.7/INT9/SDA P2.0/A8 P2.1/A9 P2.2/A10 P2.3/A11 P2.4/A12 P2.5/A13 P2.6/A14 P2.7/A15 P3.0/RXD/data P3.1/TXD/clock P3.2/INT0 P3.3/INT1 P3.4/T0 P3.5/T1 P3.6/WR P3.7/RD PIN 37 36 35 34 33 32 31 30 40 41 42 43 44 1 2 3 18 19 20 21 22 23 24 25 5 7 8 9 10 11 12 13 DESCRIPTION
P87CL881H
Port 0. 8-bit bidirectional I/O port with alternative functions. Every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. AD7 to AD0 provide the multiplexed low-order address and data bus during accesses to external memory.
Port 1. 8-bit bidirectional I/O port with alternative functions. Every port pin except P1.6 and P1.7 (I2C-bus pins) can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. Port 1 also serves the alternative functions INT2 to INT9 interrupts, Timer 2 external input and Timer 2 compare output, external clock output CLK and I2C-bus clock and I2C-bus data in/outputs.
Port 2. 8-bit bidirectional I/O port with alternative functions. Every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. Port 2 emits the high order address byte during accesses to external memory that use 16-bit addresses (MOVX @ DPTR). In this application it uses the strong internal pull-ups when emitting logic 1's. During accesses to external memory that use 8-bit addresses (MOVX @ Ri), Port 2 emits the contents of the P2 Special Function Register.
Port 3. 8-bit bidirectional I/O port with alternative functions. Every port pin can be used as open-drain, standard port, high-impedance input or push-pull output, according to Section 6.2. RXD/data is the serial port receiver data input (asynchronous) or data I/O (synchronous). TXD/clock is the serial port transmitter data output (asynchronous) or clock output (synchronous). INT0 and INT1 are external interrupt lines. T0 and T1 are external inputs for Timers 0 and 1 respectively. WR is the external memory write strobe and RD is the external memory read strobe.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6 FUNCTIONAL DESCRIPTION
P87CL881H
For the functional and block descriptions of the P87CL881, refer to the "TELX family" data sheet. 6.1 Special Function Registers Special Function Registers memory map and reset values; note 1 REGISTER NAME 80C51 core Accumulator B Register Data Pointer Low byte Data Pointer High byte Program Counter High byte Program Counter Low byte Power Control Register Prescaler Register Program Status Word Stack Pointer XRAM Page Register Timers 0 and 1 Timer/Counter Control Register Timer/Counter 0 High byte Timer/Counter 1 High byte Timer/Counter 0 Low byte Timer/Counter 1 Low byte Timer/Counter Mode Control Register Ports Alternative Port Function Control Register Port P0 output data Register Port P0 Configuration A Register Port P0 Configuration B Register Port P1 output data Register Port P1 Configuration A Register Port P1 Configuration B Register Port P2 output data Register Port P2 Configuration A Register Port P2 Configuration B Register Port P3 output data Register Port P3 Configuration A Register Port P3 Configuration B Register ALTP P0 P0CFGA P0CFGB P1 P1CFGA P1CFGB P2 P2CFGA P2CFGB P3 P3CFGA P3CFGB A3H 80H 8EH 8FH 90H 9EH 9FH A0H AEH AFH B0H BEH BFH 0000 0000 1111 1111 1111 1111 0000 0000 0111 1111 0000 1000 0111 1111 1111 1111 1111 1111 0000 0000 1111 1111 1111 1110 1111 1111 TCON TH0 TH1 TL0 TL1 TMOD 88H 8CH 8DH 8AH 8BH 89H 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 ACC B DPL DPH PCH PCL PCON PRESC PSW SP XRAMP E0H F0H 82H 83H no SFR no SFR 87H F3H D0H 81H FAH 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0111 XXXX X000 REGISTER MNEMONIC SFR ADDRESS RESET VALUE(2)
Table 2
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
REGISTER NAME Timer 2 Timer 2 Compare High byte Timer 2 Compare Low byte Timer 2 Reload/Capture High byte Timer 2 Reload/Capture Low byte Timer/Counter 2 Control Register Timer/Counter 2 High byte Timer/Counter 2 Low byte Interrupt logic Interrupt Enable Register 0 Interrupt Enable Register 1 Interrupt Enable Register 2 Interrupt Priority Register 0 Interrupt Priority Register 1 Interrupt Priority Register 2 Interrupt Sensitivity Register 1 Interrupt Polarity Register Interrupt Request Flag Register 1 Low Voltage Detection LVD Control Register PORACO Reset Status Register UART Serial Port Buffer Serial Port Control Register I2C-bus interface Address Register Serial Control Register Data Shift Register Serial Status Register Watchdog timer Watchdog Timer Control Register Watchdog Timer Interval Register WDCON WDTIM A5H FFH S1ADR S1CON S1DAT S1STA DBH D8H DAH D9H S0BUF S0CON 99H 98H RSTAT E6H LVDCON F2H IEN0 IEN1 IEN2 IP0 IP1 IP2 ISE1 IX1 IRQ1 A8H E8H F1H B8H F8H F9H E1H E9H C0H COMP2H COMP2L RCAP2H RCAP2L T2CON TH2 TL2 ABH AAH CBH CAH C8H CDH CCH REGISTER MNEMONIC SFR ADDRESS
P87CL881H
RESET VALUE(2)
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000
0000 0000
XXX1 1000
0000 0000 0000 0000
0000 0000 0000 0000 0000 0000 1111 1000
1010 0101 0000 0000
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
REGISTER NAME OTP interface OTP Address High Register OTP Address Low Register OTP Data Register OTP In-System Programming Register OTP Test Register Notes 1. E7H and FDH are reserved locations and must not be written to. 2. Where: X = undefined state. 6.2 6.2.1 I/O facilities PORTS OAH OAL ODATA OISYS OTEST D5 D4 D6 DC D7 REGISTER MNEMONIC SFR ADDRESS
P87CL881H
RESET VALUE(2)
X00X XXXX XXXX XXXX XXXX XXXX 000X 0000 0000 0000
To enable a port pin alternative function, the port bit latch in its SFR must contain a logic 1. Each port consists of a latch (Special Function Registers P0 to P3), an output driver and input buffer. All ports have internal pull-ups. Figure 3(a) shows that the strong transistor P1 is turned on for only 1 oscillator period after a LOW-to-HIGH transition in the port latch. When on, it turns on P3 (a weak pull-up) through the inverter IN1. This inverter and transistor P3 form a latch which holds the logic 1. 6.2.2 PORT I/O CONFIGURATION
The P87CL881 has 32 I/O lines treated as 32 individually addressable bits or as four parallel 8-bit addressable ports. Ports 0, 1, 2 and 3 perform the following alternative functions: Port 0 Provides the multiplexed low-order address and data bus for expanding the device with standard memories and peripherals. Port 1 Used for a number of special functions: * P1.0 to P1.7 provides the inputs for the external interrupts INT2 to INT9 * P1.0/T2 and P1.1/T2EX for external inputs of Timer 2 * P1.2/T2COMP for external activation and compare output of Timer 2 * P1.4/CLK for the clock output * P1.6/SCL and P1.7/SDA for the I2C-bus interface are real open-drain outputs or high-impedance; no other port configurations are available. Port 2 Provides the high-order address bus when expanding the device with external program memory and/or external data memory. Port 3 Pins can be configured individually to provide: * P3.0/RXD/data and P3.1/TXD/clock which are serial port receiver input and transmitter output (UART) * P3.2/INT0 and P3.3/INT1 are external interrupt request inputs * P3.4/T0 and P3.5/T1 as counter inputs * P3.6/WR and P3.7/RD are control signals to write and read to external memories.
I/O port output configurations are determined by the settings in the port configuration SFRs. Each port has two associated SFRs: PnCFGA and PnCFGB, where `n' indicates the specific port number (0 to 3). One bit in each of the 2 SFRs relates to the output setting for the corresponding port pin, allowing any combination of the 2 output types to be mixed on those port pins. For example, the output type of P1.3 is controlled by setting bit 3 in the SFRs P1CFGA and P1CFGB. The port pins may be individually configured via the SFRs with one of the following modes (P1.6 and P1.7 can be open-drain or high-impedance but never have any diodes against VDD). Mode 0 Open-drain; quasi-bidirectional I/O with n-channel open-drain output. Use as an output (e.g. Port 0 for external memory accesses (EA = 0) or access above the built-in memory boundary) requires the connection of an external pull-up resistor. The ESD protection diodes against VDD and VSS are still present. Except for the I2C-bus pins P1.6 and P1.7, ports which are configured as open-drain still have a protection diode to VDD. See Fig.3a.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
Mode 1 Standard port; quasi-bidirectional I/O with pull-up. The strong pull-up p1 is turned on for only one oscillator periods after a LOW-to-HIGH transition in the port latch. After these two oscillator periods the port is only weakly driven through p2 and `very weakly' driven through p3. See Fig.3b. Mode 2 High-impedance; this mode turns all port output drivers off. Thus, the pin will not source or sink current and may be used as an input-only pin with no internal drivers for an external device to overcome. See Fig.3c. Mode 3 Push-pull; output with drive capability in both polarities. In this mode, pins can only be used as outputs. See Fig.3d. Table 3 Port configuration register settings PORT OUTPUT CONFIGURATION PnCFGA 0 1 0 1 PnCFGB NORMAL PORTS 0 1 2 3 Note 0 0 1 1 open-drain quasi-bidirectional high-impedance push-pull
P87CL881H
Tables 2 and 3 show the configuration register settings for the four output configurations. The electrical characteristics of each output configuration are specified in Chapter 8. The default port configuration after reset is given in Table 2. In case of external memory access, the appropriate options for ports P0, P2 and P3.6/P3.7 (WR/RD, only in case of external data memory access) must be set by software. For Special Function Registers for port configurations/data please refer to Table 2, note 1.
MODE(1)
I2C-BUS PORTS (P1.6 AND P1.7) open-drain open-drain high-impedance open-drain
1. Mode changes may cause glitches to occur during transitions. When modifying both registers, write instructions should be carried out consecutively.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
handbook, full pagewidth
P87CL881H
VDD this diode is not implemented on the I2C-bus pins I/O pin Q from port latch
VDD external external pull-up
n VSS VSS
MBK004
input data
a. Open-drain.
handbook, full pagewidth
strong pull-up 1 oscillator period p1
VDD
p2 p3 I/O pin
Q from port latch
n VSS
IN1 VSS
MBK001
input data
b. Standard/quasi-bidirectional.
handbook, full pagewidth
VDD this diode is not implemented on the I2C-bus pins input data I/O pin
VSS
MBK002
c. High-impedance.
handbook, full pagewidth
strong pull-up VDD VDD
p I/O pin Q from port latch n VSS input data VSS
MBK003
d. Push-pull. Fig.3 Port configuration options.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6.3 Internal data memory
P87CL881H
The internal data memory is divided into three physically separated parts: 256 bytes of RAM, 128 bytes of Special Function Registers and 1792 bytes of AUX-RAM. These can be addressed each in a different way (see also Table 4). 1. RAM 0 to 127 can be addressed directly and indirectly as in the 80C51; address pointers are R0 and R1 of the selected register-bank 2. RAM 128 to 255 can only be addressed indirectly; address pointers are R0 and R1 of the selected register bank 3. AUX-RAM 0 to 1791 is indirectly addressable via the AUX-RAM Page Register (XRAMP) and MOVX-Ri instructions, unless it is disabled by setting ARD = 1. AUX-RAM 0 to 1791 is also indirectly addressable as external data memory via MOVX-datapointer instruction, unless it is disable by setting ARD = 1. When executing from internal program memory, an access to AUX-RAM 0 to 1791 when ARD = 0 will not affect the ports P0, P2, P3.6 and P3.7. An access to external data memory locations higher than 1791 will be performed with the MOVX @ DPTR
instructions in the same way as in the 80C51 structure, so with P0 and P2 as data/address bus and P3.6 and P3.7 as write and read timing signals. Note that the external data memory cannot be accessed with R0 and R1 as address pointer if the AUX-RAM is enabled (ARD = 0, default after reset). The Special Function Registers (SFR) can only be addressed directly in the address range from 128 to 255. Four register banks, each 8 registers wide, occupy locations 0 through 31 in the lower RAM area. Only one of these banks may be enabled at a time. The next 16 bytes, locations 32 through 47, contain 128 directly addressable bit locations. The stack can be located anywhere in the internal 256 bytes RAM. The stack depth is only limited by the available internal RAM space of 256 bytes (see Fig.4). Table 4 Internal data memory map ADDRESS 0 to 127 0 to 1791 128 to 255 128 to 255 ADDRESSING direct and indirect indirect only with MOVX indirect only direct only
LOCATION RAM AUX-RAM RAM SFR
FFFFH
handbook, full pagewidth
FFFFH FBFFH (ARD = 0/1)
0700H PAGE 6 PAGE 5 FFH INDIRECT ADDRESSING 7FH INTERNAL (EA = 1) 0 0 EXTERNAL (EA = 0) 00H INDIRECT AND DIRECT ADDRESSING INTERNAL RAM DIRECT PAGE 4 PAGE 3 PAGE 2 PAGE 1 PAGE 0 0000H INTERNAL AUX-RAM (ARD = 0) DATA MEMORY EXTERNAL DATA MEMORY
MGL618
06FFH
(ARD = 1)
PROGRAM MEMORY
Fig.4 Memory map.
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6.3.1 AUX-RAM PAGE REGISTER (XRAMP)
P87CL881H
The AUX-RAM Page Register is used to select one of the seven 256 bytes pages of the internal 1792-byte AUX-RAM for MOVX-accesses via R0 or R1. Its reset value is `XXXX X000' (AUX-RAM page 0). Table 5 7 - Table 6 BIT 7 to 3 2 1 0 Table 7 ARD(1) 0 0 0 0 0 0 0 0 1 0 1 Note 1. ARD (AUX-RAM Disable) corresponds to bit 6 in the Special Function Register PCON (address 87H). AUX-RAM Page Register (SFR address FAH) 6 - 5 - 4 - 3 - 2 XRAMP2 1 XRAMP1 0 XRAMP0
Description of XRAMP bits SYMBOL - XRAMP2 XRAMP1 XRAMP0 AUX-RAM page select bit 2 AUX-RAM page select bit 1 AUX-RAM page select bit 0 FUNCTION reserved, undefined during read, a write operation must write logic 0 to these locations
Memory locations for all possible MOVX accesses XRAMP2 XRAMP1 XRAMP0 0 0 0 0 1 1 1 1 X X X 0 0 1 1 0 0 1 1 X X X 0 1 0 1 0 1 0 1 X X X ACCESS AUX-RAM page 0 (address 0 to 255) AUX-RAM page 1 (address 256 to 511) AUX-RAM page 2 (address 512 to 767) AUX-RAM page 3 (address 768 to 1023) AUX-RAM page 4 (address 1024 to 1279) AUX-RAM page 5 (address 1280 to 1535) AUX-RAM page 6 (address 1536 to 1791) no valid memory access external RAM locations 0 to 255 AUX-RAM locations 0 to 1791 external RAM locations 1792 to 65535 external RAM locations 0 to 65535 MOVX @ DPTR, A and MOVX A, DPTR INSTRUCTION TYPE MOVX @ Ri, A and MOVX @ A, Ri
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6.4 6.4.1 OTP programming OTP PROGRAMMING 6.4.2
P87CL881H
IN-SYSTEM PROGRAMMING MODE
The 63-kbyte One-Time Programmable (OTP) memory can be programmed by using an OM4260 programmer together with a programmer adapter OM5510. Since the memory is programmable only once, programming an already programmed address results in a logical AND of the old and new code. The OTP code can be read out by the programmer for verification.
In the In-System Programming mode the OTP can be programmed under control of the CPU. A program to control programming has to be available in the OTP. This mode can be used to program several bytes in the OTP if the chip is already in a system e.g. to store tuning parameters. In the In-System Programming mode the complete address space OTP can be programmed. The user should take care not to overwrite the existing code. For In-System Programming four SFRs are used to control the OTP. Table 8 SFRs for In-System Programming SFR NAME OAH OAL ODATA OISYS DESCRIPTION OTP Address High Register OTP Address Low Register OTP Data Register OTP In-System Register
6.4.1.1
Signature bytes
The OTP memory contains three signature bytes which can be read by the programmer to identify the device. A special address space has been used for these bytes which does not influence the user address space. The values of the signature bytes are: (030H) = 15H, indicates manufactured by Philips Semiconductors (031H) = D6H, indicates P87CL881H (060H) = 00H, currently not used.
6.4.2.1
OTP In-System Programming Register (OISYS)
The OISYS SFR controls the In-System Programming mode. The data that has to be programmed is stored in the SFR ODATA and the address for this data in the SFRs OAH and OAL. Table 9 7 - OTP In-System Programming Register (SFR address DCH) 6 - 5 - 4 VPon 3 0 2 SIG 1 WE 0 InSysMode
Table 10 Description of OISYS bits BIT 7 to 5 4 3 2 1 0 SYMBOL - VPon 0 SIG WE InSysMode These bits are reserved. VPP status (read only). This bit is reserved and must be kept to logic 0. Signature bytes enable. Write Enable, enables programming. In-System Programming status bit. DESCRIPTION
1999 Apr 16
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Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6.4.2.2 Mode entry
P87CL881H
The In-System Programming mode is entered by setting the InSysMode bit of the OISYS SFR. The I2C-bus is used for data transfer in this mode. If the I2C-bus interface is addressed by an external master, the interface generates an interrupt request. The interrupt handler can now read the OISYS SFR and determine the status of the external high voltage (VPon). If high voltage is not present the interrupt is a standard I2C-bus interrupt. If high voltage is present the In-System program interrupt routine has to start that writes the InSysMode bit (OISYS.0) and controls the address and data transfer. The program voltage has to be available and stable for at least 10 s before the mode is entered and has to be stable until the circuit has left the In-System Programming mode. The high voltage can be applied for maximum 60 seconds during the complete lifetime of the circuit.
The signature bytes (and other test addresses) are always readable independent of the security.
6.4.2.6
How to connect the PORENABLE/VPP pin in the In-System Programming mode
If the VPP pin is dual-mode (e.g. PORENABLE/VPP), ICs connected to the signal PORENABLE must be able to withstand up to 13 V, i.e. cannot have clamping diodes or low break-down voltages. If the pin is connected to a fixed voltage (VDD or VSS) there must be a way of switching-off this connection on the PCB. A possible implementation is presented in Fig.5. In the example (see Fig.5) the POR is enabled in normal mode of operation (pin PORENABLE/VPP = 1 by the pull-up), but the VPP source must supply enough current in Rp in order to guarantee a minimum 12.5 V on the PORENABLE/VPP pin. Note that if in the application the Power-on reset is disabled (pin PORENABLE/VPP = 0), applying a high voltage to the PORENABLE/VPP pin will also enable the POR circuit. This will cause a reset independent of the actual VDD value.
6.4.2.3
Program cycle
The data and address must be supplied to the microcontroller and the control program has to write the SFRs: ODATA, OAH and OAL. A timer has to be initialized for a 100 s cycle and the WE bit of the OISYS SFR must be set. Now the core has to be set into Idle mode. As long as the circuit is in Idle mode a programming pulse is applied. After the interrupt request of the timer the OTP is available for normal code fetching. The address applied to the OAH and OAL SFRs must be in the 63 kbytes address space.
handbook, halfpage
VDD Rp
VPP pad on PCB 44 34
6.4.2.4
Verify for In-System Programming
1
Verify is done in similar way as programming. The circuit is put into Idle mode and at the start of this mode the sense amplifiers are switched to verify mode and a read cycle is started. The timer has to be initialized for a cycle of at least 1 s. The address is supplied by the SFRs OAH and OAL. The WE bit of the OISYS SFR has to be reset. The OTP output data is latched in the ODATA SFR. After Idle mode is finished this SFR can be read in a normal way. To be sure that the verified data is written into the SFR it is advised to write FFH into the ODATA SFR before a verify is started.
33
6
P87CL881H
11
23
6.4.2.5
Signature bytes
12
22
MBL001
The signature bytes can be read by setting the SIG bit of the OISYS SFR and applying the address of the signature byte. Applying a write pulse while the SIG bit of the OISYS SFR is HIGH is forbidden although the contents of the signature bytes will never be destroyed. 1999 Apr 16 16
Fig.5
Example of PORENABLE/VPP connection on a PCB.
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
6.5 Oscillator circuitry 6.6 6.6.1 Non-conformance
P87CL881H
General information on the oscillator circuitry can be found in the "TELX family" data sheet. 6.5.1 RESONATOR REQUIREMENTS
PROGRAMMING INTERFACE/TRANSPARENT MODE
The transparent mode is a special operating mode of the microcontroller used for parallel and In-System OTP programming. For certain combinations of data written to Port 2 (used for control signal during parallel programming mode) the Transparent mode may be incorrectly active during normal operation of the microcontroller. In this case, a transition on any of the Port 0 pins can influence the read out of the on-chip program memory resulting in incorrect code execution. To avoid this problem, the InSysMode bit in the OTP In-System Programming Register (SFR address DCH) must be set in the start-up sequence of the program code. Apart from preventing incorrect operation as described above, the setting of this bit does not affect the normal operation.
For correct function of the oscillator, the values of R1 and C0 of the chosen resonator (quartz or PXE) must be below the line shown in Fig.6a. The value of the parallel resistor R0 must be less than 47 k. The wiring between chip and resonator should be kept as short as possible.
handbook, halfpage
500
MDA088
R1 () 400
300
(1) (2) (3)
6.6.2
200
MOVC INSTRUCTION LIMITATION
The `MOVC' access to a data or program byte stored in internal ROM/OTP-memory is inhibited while fetching code from external program memory in roll-over mode. Roll-over mode means that the CPU executes code out of the external program memory because the program counter exceeds the highest address for internal program memory. The affected address range is FC00H to FFFFH. 6.6.3 LOW VOLTAGE DETECTION
100
0 0 20 40 60 Co (pF) 80
C1e and C2e are the external load capacitances; normally not needed due to integrated load capacitances of typically 10 pF. (1) C1e = C2e = 22 pF. (2) C1e = C2e = 0 pF. (3) C1e = C2e = 12 pF.
a. Resonator curves for 3.58 MHz.
The LVDI bit (LVDCON.6) may be incorrectly set due to a glitch on the LVD output when the LVD is enabled by changing the bits LVDCON<3:0> from `0000' to any value within the range `0001' to `0101'. If bit EA in register IEN0 is enabled, an unwanted interrupt may occur. A software workaround for this problem exist. During the initialisation sequence:
handbook, halfpage
C1
L1 R0
R1
* Enable LVD by writing to register LVDCON * Enable LVD interrupt by writing to register IEN2 * Clear the LVDI bit by writing to LVDCON a second time
MGL137
C0
* Set bit EA in register IEN0 (ensures LVDI to be cleared after initialisation).
b. Resonator equivalent circuit. Fig.6 Resonator requirements for the ACO.
1999 Apr 16
17
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
7 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD VI Ptot Tstg supply voltage input voltage on any pin with respect to ground (VSS) total power dissipation storage temperature PARAMETER MIN. -0.5 -0.5 - -65
P87CL881H
MAX. +4.0 VDD + 0.5 800 +150 V V
UNIT
mW C
8 DC CHARACTERISTICS VDD = 2.7 to 3.6 V; VSS = 0 V; fxtal = 1 to 10 MHz; Tamb = -25 to +70 C; all voltages with respect to VSS; unless otherwise specified. SYMBOL Supply VDD supply voltage operating RAM data retention in Power-down mode VPP IDD IDD(id) IDD(pd) OTP programming voltage supply current operating supply current Idle mode VDD = 3 V; fxtal = 7 MHz; note 1 Tamb = 25 C VDD = 3 V; fxtal = 7 MHz; note 2 Tamb = 25 C supply current Power-down VDD = 3 V; Tamb = 25 C; note 3 mode POR and LVD enabled POR and LVD disabled IDD(block) supply current per block: Watchdog I2C-bus UART Timer T2 Timer T0 or T1 VDD = 3 V; fxtal = 7 MHz; Tamb = 25 C; notes 4 and 5 2.7 1.0 12.5 - - - - - - - - - - - - - - - 3.7 - 0.58 2 50 220 180 180 180 10 3.6 3.6 13.0 4.8 - 0.7 - 5 - - - - - - V V V mA mA mA mA A nA A A A A A PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
1999 Apr 16
18
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
SYMBOL PARAMETER CONDITIONS MIN. - 10 200
P87CL881H
TYP.
MAX.
UNIT
Inputs (ports, RST and PORENABLE) VIL VIH IIL IIL(T) LOW-level input voltage HIGH-level input voltage LOW-level input current (ports in Mode 1) LOW-level input current; HIGH-to-LOW transition (ports in Mode 1) notes 6 and 7 note 6 VIN = 0.4 V; note 8 and Fig.8 VIN = 0.2VDD; note 8 and Fig.8 0 - - 0.2VDD V VDD 50 1000 V A A 0.8VDD -
IILEAK
input leakage current (ports VSS VI VDD in Mode 0 or 2)
-
-
1
A
Outputs (ports and RST) IOL IOL2 IOH LOW-level output current; except SDA and SCL LOW-level output current; SDA and SCL HIGH-level output current except (push-pull options only) VOL = 0.4 V VOL = 0.4 V; note 9 VOH = VDD - 0.4 V 2 3 2 - - - - - - mA mA mA
IRST
RST pull-up current source VDD = 3 V; VOH = VDD - 0.4 V VDD = 3 V; VOH = VSS
0.05 -
0.2 0.6
- 2.5
A A
POR (Power-on reset) for the LVD (Low Voltage Detection), see note 10 VPORH VPORL trip level HIGH trip level LOW (option 5 in "TELX family specification") (option B in "TELX family specification") 2.13 - 2.37 1.30 2.61 - V V
ACO (Amplitude Controlled Oscillator) VXTAL1 zi(XTAL1) C1i; C2i external clock signal amplitude peak-to-peak input impedance on XTAL1 input capacitance on XTAL1 and XTAL2 notes 5 and 11 500 300 - - 1000 10 VDD - - mV k pF
In-System Programming for the OTP tprog tver tVPP(setup) tVPP(max) IVPP program cycle time verify cycle time program voltage setup time maximum program voltage time program voltage current cumulative for the product lifetime In-System Programming 90 180 1 10 - - 100 200 - - - - 110 220 - - 60 40 s s s s s mA tprog(security) program cycle time security note 12
1999 Apr 16
19
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
Notes
P87CL881H
1. The operating supply current is measured with all output pins disconnected; VIL = VSS; VIH = VDD; RST = VDD; XTAL1 driven with square wave; XTAL2 not connected; fetch of NOP instructions; all derivative blocks disabled. 2. The Idle mode supply current is measured with all output pins and RST disconnected; VIL = VSS; VIH = VDD; XTAL1 driven with square wave; XTAL2 not connected; all derivative blocks disabled. 3. The power-down current is measured with all output pins and RST disconnected; VIL = VSS; VIH = VDD; XTAL1 and XTAL2 not connected. 4. The typical currents are only for the specific block. To calculate the typical power consumption of the microcontroller, the current consumption of the CPU must be added. Example: the typical current consumption of the microcontroller in operating mode with CPU, Watchdog and UART active can be calculated as (3.7 + 0.220 + 0.18) mA = 4.1 mA at VDD = 3 V and fXTAL = 7 MHz. 5. Verified on sampling basis. 6. The input threshold voltage of P1.6/SCL and P1.7/SDA meet the I2C-bus specification. Therefore, an input voltage below 0.3VDD will be recognized as a logic 0 and an input voltage above 0.7VDD will be recognized as a logic 1. 7. For pin PORENABLE the VIL max is 0.1VDD. 8. Not valid for pins SDA, SCL, RST and PORENABLE. 9. The maximum allowed load capacitance CL is in this case limited to around 200 pF. 10. The LVD is tested according to the "TELX family specification, Chapter - Low voltage detection". 11. C1i/C2i are the total internal capacitances (including gate capacitance and leadframe capacitance). 12. Can also be done by two 100 s pulses.
handbook, full pagewidth
500 A
MGL506
II
I IL(T)
10 A 0
IIL 0.3VDD 0.5VDD VDD
Fig.7 Input current.
1999 Apr 16
20
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
P87CL881H
MGL625
MGL626
handbook, halfpage
5.3
handbook, halfpage
1.0
IDD (mA) 4.7
IDD(id) (mA) 0.8
4.1
0.6
3.5
0.4
2.9 2.2
2.6
3
3.4
3.8 4.2 VDD (V)
0.2 2.2
2.6
3
3.4
3.8 4.2 VDD (V)
Fig.8
Typical operating current as a function of VDD; Tamb = 25 C; fxtal = 7 MHz.
Fig.9
Typical Idle current as a function of VDD; Tamb = 25 C; fxtal = 7 MHz.
handbook, halfpage
4
MDA085
IDD(pd) (A)
(1)
3
(2)
2
1
(3)
(4)
0 0 1 2 3 VDD (V) 4
(1) (2) (3) (4)
POR and LVD enabled (Tamb = 70 C). POR and LVD enabled (Tamb = 25 C). POR and LVD disabled (Tamb = 70 C). POR and LVD disabled (Tamb = 25 C).
Fig.10 Typical power-down current as a function of VDD.
1999 Apr 16
21
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
P87CL881H
9 AC CHARACTERISTICS VDD = 3 V; VSS = 0 V; Tamb = -25 to +70 C; CL = 50 pF for Port 0, ALE and PSEN; CL = 80 pF for all other outputs unless otherwise specified. All values verified on sampling basis. VARIABLE CLOCK SYMBOL External program memory tLHLL tAVLL tLLAX tLLIV tLLPL tPLPH tPLIV tPXIX tPXIZ tAVIV tPLAZ tRLRH tWLWH tAVLL tLLAX tRLDV tRHDX tRHDZ tLLDV tAVDV tLLWL tAVWL tWHLH tQVWX tQVWH tWHQX tRLAZ ALE pulse width address valid to ALE LOW address hold after ALE LOW ALE LOW to valid instruction in ALE LOW to PSEN LOW PSEN pulse width PSEN LOW to valid instruction in input instruction hold after PSEN input instruction float after PSEN address to valid instruction in PSEN LOW to address float tCLK 0.5tCLK - 10 0.5tCLK - 0.5tCLK 1.5tCLK - 0 - - - - - - 2tCLK - 25 - - 1.5tCLK - 35 - 0.5tCLK 2.5tCLK - 35 5 - - - - 2.5tCLK - tCLK 4tCLK 4.5tCLK - 30 1.5tCLK + 15 - 0.5tCLK + 5 - - - 0 ns ns ns ns ns ns ns ns ns ns ns PARAMETER MIN. MAX. UNIT
External data memory RD pulse width WR pulse width address valid to ALE LOW address hold after ALE LOW RD LOW to valid data in data hold after RD data float after RD ALE LOW to valid data in address to valid data in ALE LOW to RD or WR LOW address valid to RD or WR LOW RD or WR HIGH to ALE HIGH data valid to WR transition data valid time WR HIGH data hold after WR RD LOW to address float 3tCLK 3tCLK 0.5tCLK 0.5tCLK - 0 - - - 1.5tCLK - 15 2tCLK 0.5tCLK - 5 0.5tCLK 3.5tCLK 0.5tCLK - ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
1999 Apr 16
22
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
P87CL881H
handbook, full pagewidth
one machine cycle S1 P1 P2 XTAL1 INPUT S2 P1 P2 S3 P1 P2 S4 P1 P2 S5 P1 P2 S6 P1 P2 S1 P1 P2 S2 P1 P2
one machine cycle S3 P1 P2 S4 P1 P2 S5 P1 P2 S6 P1 P2
ALE dotted lines are valid when RD or WR are active PSEN
only active during a read from external data memory only active during a write to external data memory
RD
WR
external program memory fetch
BUS (PORT 0)
inst. in
address A0 - A7
inst. in
address A0 - A7
inst. in
address A0 - A7
inst. in
address A0 - A7
PORT 2
address A8 - A15
address A8 - A15
address A8 - A15
address A8 - A15
read or write of external data memory
BUS (PORT 0)
inst. in
address A0 - A7
inst. in
address A0 - A7
data output or data input
address A0 - A7
PORT 2
address A8 - A15
address A8 - A15 or Port 2 out
address A8 - A15
PORT OUTPUT
old data
new data
PORT INPUT sampling time of I/O port pins during input (including INT0 and INT1) SERIAL PORT CLOCK
MGA180
Fig.11 Instruction cycle timing.
1999 Apr 16
23
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
P87CL881H
handbook, full pagewidth
t CY t LHLL t LLIV
ALE t LLPL t PLPH PSEN t LLAX t AVLL PORT 0 A0 to A7 t PLAZ t AVIV PORT 2 address A8 to A15 address A8 to A15
MGA176
t PLIV inst. input
t PXIZ A0 to A7 t PXIX inst. input
Fig.12 Read from external program memory.
handbook, full pagewidth
t CY t LHLL t LLDV t WHLH
ALE
PSEN t LLWL RD t AVLL t LLAX t AVWL PORT 0 A0 to A7 t RLAZ tAVDV PORT 2 address A8 to A15 (DPH) or Port 2
MGA177
t RLRH
t RHDZ t RLDV t RHDX data input
Fig.13 Read from external data memory.
1999 Apr 16
24
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
t CY t LHLL ALE
P87CL881H
handbook, full pagewidth
t WHLH
PSEN t LLWL t WLWH
WR t AVWL t AVLL t LLAX t QVWX PORT 0 A0 to A7 data output t QVWH t WHQX
PORT 2
address A8 to A15 (DPH) or Port 2
MGA178
Fig.14 Write to external data memory.
9.1
AC testing
AC testing inputs are driven at 2.4 V for a HIGH level and 0.45 V for a LOW level. Timing measurements are taken at 2.0 V for a HIGH level and 0.8 V for a LOW level, see Fig.15a. The float state is defined as the point at which a Port 0 pin sinks 3.2 mA or sources 400 A at the voltage test levels, see Fig.15b.
handbook, full pagewidth
VOH(min) VOL(max)
VIH(min) VIL(max)
MGL620
a. AC inputs during testing are driven at VOH(min) for a logic 1 and VOL(max) for a logic 0. Timing measurements are made at VIH(min) for a logic 1 and VIL(max) for a logic 0.
VOH - 0.1 V VOL - 0.1 V
MGL619
handbook, full pagewidth
VLOAD = 0.5 VDD
VLOAD - 0.1 V VLOAD - 0.1 V
b. For timing purposes, a port is no longer floating when a 100 mV change from load voltage occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOH/IOL > 1.6 mA. Fig.15 AC testing input, output waveform (a) and float waveform (b).
1999 Apr 16
25
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
10 PACKAGE OUTLINE LQFP44: plastic low profile quad flat package; 44 leads; body 10 x 10 x 1.4 mm
P87CL881H
SOT389-1
c
y X
33 34
23 22 ZE
A
e E HE wM pin 1 index bp 44 1 11 ZD bp D HD wM B vM B vM A 12 detail X L A A2 A1
Q (A 3) Lp
e
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT389-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION A max. 1.60 A1 0.15 0.05 A2 1.45 1.35 A3 0.25 bp 0.45 0.30 c D (1) E (1) e HD HE L Lp 0.75 0.45 Q 0.70 0.57 v 0.20 w 0.20 y 0.10 Z D (1) Z E (1) 1.14 0.85 1.14 0.85 7 0o
o
0.20 10.10 10.10 12.15 12.15 1.0 0.80 0.12 9.90 9.90 11.85 11.85
ISSUE DATE 95-12-19
1999 Apr 16
26
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
11 SOLDERING 11.1 Introduction to soldering surface mount packages
P87CL881H
* Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. 11.4 Manual soldering
This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering is not always suitable for surface mount ICs, or for printed-circuit boards with high population densities. In these situations reflow soldering is often used. 11.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, infrared/convection heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 230 C. 11.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed. If wave soldering is used the following conditions must be observed for optimal results:
Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
1999 Apr 16
27
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
11.5 Suitability of surface mount IC packages for wave and reflow soldering methods SOLDERING METHOD PACKAGE WAVE BGA, SQFP PLCC(3), SO, SOJ not suitable suitable(2) suitable not recommended(3)(4) not recommended(5) suitable suitable suitable suitable suitable HLQFP, HSQFP, HSOP, HTSSOP, SMS not LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes
P87CL881H
REFLOW(1)
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink (at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version). 3. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
1999 Apr 16
28
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
12 DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
P87CL881H
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. 13 LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 14 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011.
1999 Apr 16
29
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
NOTES
P87CL881H
1999 Apr 16
30
Philips Semiconductors
Product specification
Low-voltage microcontroller with 63-kbyte OTP program memory and 2-kbyte RAM
NOTES
P87CL881H
1999 Apr 16
31
Philips Semiconductors - a worldwide company
Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 1 60 101 1248, Fax. +43 1 60 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 20 0733, Fax. +375 172 20 0773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 68 9211, Fax. +359 2 68 9102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381, Fax. +1 800 943 0087 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V, Tel. +45 33 29 3333, Fax. +45 33 29 3905 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615 800, Fax. +358 9 6158 0920 France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex, Tel. +33 1 4099 6161, Fax. +33 1 4099 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 2353 60, Fax. +49 40 2353 6300 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: PT Philips Development Corporation, Semiconductors Division, Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510, Tel. +62 21 794 0040 ext. 2501, Fax. +62 21 794 0080 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108-8507, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381, Fax +9-5 800 943 0087 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Pakistan: see Singapore Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Al. Vicente Pinzon, 173, 6th floor, 04547-130 SAO PAULO, SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 821 2382 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 93 301 6312, Fax. +34 93 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 5985 2000, Fax. +46 8 5985 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2741 Fax. +41 1 488 3263 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2886, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381, Fax. +1 800 943 0087 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors, International Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1999
Internet: http://www.semiconductors.philips.com
SCA63
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
465008/00/01/pp32
Date of release: 1999 Apr 16
Document order number:
9397 750 05026

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